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S7847 series is a family of fft-ccd image sensors specifically designed for low-light-level detection in scientific application s. by using the binning operation, S7847 series can be used as a linear image sensor having a long aperture in the direction of the device leng th. this makes S7847 series ideally suited for use in spectrophotometry. the binning operation offers significant improvement in s/n and signa l processing speed compared with conventional methods by which signals are digitally added by an external circuit. S7847 series also feature s low noise and low dark signal (mpp mode operation). these enable low-light-level detection and long integration time, thus achieving a wide d ynamic range. S7847 series has a pixel size of 24 24 m and is available in active area of 24.576 (h) 2.976 (v) and 24.576 (h) 6.048 (v ) mm. a four-stage peltier element is built into the same package for thermoelectric cooling. at room temperature operation, the devi ce can be cooled down to -70 ?c with using forced air cooling. in addition, since both the ccd chip and peltier element are hermetically sealed, no dry air is required, thus allowing easy handling. features l 1024 (h) 124 (v) and 1024 (h) 252 (v) pixel format l pixel size: 24 24 m l 100 % fill factor l wide dynamic range l low dark current l low readout noise l mpp operation l four-stage te-cooled l high ir response applications l astronomy l scientific measuring instrument l fluorescence spectrometer l raman spectrophotometer l optical and spectrophotometric analyzer l for low-light-level detection requiring image sensor ccd area image sensor high ir sensitivity, four-stage te-cooled, front-illuminated fft-ccds S7847 series selection and order guide type no. cooling number of total pixels number of active pixels active area [mm (h) mm (v)] S7847-1007 1044 128 1024 124 24.576 2.976 S7847-1008 four-stage te-cooled 1044 256 1024 252 24.576 6.048 S7847 series has a hermetically-sealed package with ar-coated sapphire window. general ratings parameter specification ccd structure full frame transfer fill factor 100 % number of active pixels S7847-1007 : 1024(h) 124 (v) S7847-1008 : 1024(h) 252 (v) pixel size 24 (h) 24 (v) m active area S7847-1007: 24.576 (h) 2.976 (v) mm S7847-1008: 24.576 (h) 6.048 (v) mm vertical clock phase 2 phase horizontal clock phase 2 phase output circuit one-stage mosfet source follower package 28 pin metal package window ar coated sapphire 1
ccd area image sensor S7847 series absolute maximum ratings (ta=25 c) parameter symbol min. typ. max. unit operating temperature topr -50 - +30 c storage temperature tstg -100 - +70 c od voltage v od -0.5 - +25 v rd voltage v rd -0.5 - +18 v isv voltage v isv -0.5 - +18 v ish voltage v ish -0.5 - +18 v igv voltage v ig1v , v ig2v -10 - +15 v igh voltage v ig1h , v ig2h -10 - +15 v sg voltage v sg -10 - +15 v og voltage v og -10 - +15 v rg voltage v rg -10 - +15 v tg voltage v tg -10 - +15 v vertical clock voltage v p1v , v p2v -10 - +15 v horizontal clock voltage v p1h , v p2h -10 - +15 v operating conditions (mpp mode, ta=25 c) parameter symbol remark min. typ. max. unit output transistor drain voltage v od -182022v reset drain voltage v rd - 11.5 12 12.5 v output gate voltage v og -135v substrate voltage v ss - - 0 - v test point (vertical input source) v isv --v rd -v test point (horizontal input source) v ish - - v rd - v test point (vertical input gate) v ig1v , v ig2v --80-v test point (horizontal input gate) v ig1h , v ig2h - -8 0 - v high v p1vh , v p2vh -468 vertical shift register clock voltage low v p1vl , v p2vl --9-8-7 v high v p1hh , v p2hh - 4 6 8 horizontal shift register clock voltage low v p1hl , v p2hl - -9 -8 -7 v high v sgh -468 summing gate voltage low v sgl --9-8-7 v high v rgh - 4 6 8 reset gate voltage low v rgl - -9 -8 -7 v high v tgh -468 transfer gate voltage low v tgl --9-8-7 v electrical characteristics (ta=25 c) parameter symbol remark min. typ. max. unit signal output frequency fc - - 80 2,000 khz reset clock frequency frg - - 80 2,000 khz S7847-1007 - 3,200 - vertical shift register capacitance S7847-1008 c p1v , c p2v - - 6,400 - pf horizontal shift register capacitance c p1h , c p2h - - 300 - pf summing gate capacitance c sg --7-pf reset gate capacitance c rg --7-pf transfer gate capacitance c tg - - 150 - pf transfer efficiency cte * 1 0.99995 0.99999 - - dc output level vout * 2 12 15 18 v output impedance zo * 2 -3- k ? power dissipation p * 2, * 3 - 15 - mw *1: charge transfer efficiency per pixel, measured at half of the full well capacity. *2: v od =20 v, load resistance =22 k ? *3: power dissipation of the on-chip amplifier. 2
ccd area image sensor S7847 series electrical and optical characteristics (ta=25 c, unless otherwise noted) parameter symbol remark min. typ. max. unit saturation output voltage vsat - - fw sv - v vertical 150 300 - full well capacity horizontal fw * 4 300 600 - ke - ccd conversion efficiency sv * 5 1.8 2.2 - v/e - +25 c - 4,000 30,000 0 c - 200 1,500 dark current (mpp mode) -70 c ds * 6 - 0.0015 0.1 e - /pixel/s readout noise nr * 7 -612 e - rms line binning 25,000 75,000 - dynamic range area scanning dr * 8 12,500 37,500 - - spectral response range - - 400 to 1,100 - nm photo response non-uniformity prnu * 9 - - 10 % point defects * 10 --0 cluster defects * 11 --0 blemish column defects - * 12 --0 - *4: large horizontal full well for line binning operation. *5: v od =20 v , load resistance =22 k ? *6: dark current nearly doubles for every 5 to7 c increase in temperature. *7: -40 c, operating frequency is 80 khz *8: dr = fw / nr *9: measured at half of the full well capacity. prnu (%) = noise / signal 100, noise : fixed pattern noise (peak to peak) *10: white spots > 3 % of full well at 0 c after ts=1 s, black spots > 50 % reduction in response relative to adjacent pixels *11: continuous 2 to 9 point defects *12: continuous > 10 point defects pin connections pin no. symbol description remark 1 p- te-cooler- 2 nc 3ss substrate (gnd) 4 nc 5isv test point (vertical input source) shorted to rd 6 ig2v test point (vertical input gate-2) shorted to 0 v 7ig1v test point (vertical input gate-1) shorted to 0 v 8 rg reset gate 9 rd reset drain 10 os output transistor source 11 od output transistor drain 12 og output gate 13 sg summing gate same timing as p2h 14 p+ te-cooler+ 15 tsh1 temperature sensor (hot side) 16 tsc1 temperature sensor (cool side) 17 tsc2 temperature sensor (cool side) 18 p2h ccd horizontal register clock-2 19 p1h ccd horizontal register clock-1 20 ig2h test point (horizontal input gate-2) shorted to 0 v 21 ig1h test point (horizontal input gate-1) shorted to 0 v 22 ish test point (horizontal input source) shorted to rd 23 p2v ccd vertical register clock-2 24 p1v ccd vertical register clock-1 25 tg transfer gate same timing as p2 v * 13 26 nc 27 nc 28 tsh2 temperature sensor (hot side) *13: tg is an isolation gate between vertical register and horizontal resister. in st andard operation, the same pulse of p2v should be applied to the tg. 3
ccd area image sensor S7847 series 50 40 30 20 10 0 400 500 600 700 wavelength (nm) 800 900 1000 1100 1200 quantum efficiency (%) (typ. ta = 25 c) S7847 series s7017 series kmpdb0104ea spectral response without window 100 (typ. ta=25 ? c) 95 90 85 80 400 500 600 700 800 wavelength (nm) transmittance (%) 900 1000 1100 1200 ar coated sapphire kmpdb0106ea kmpda0099ea dimensional outline (unit: mm) 4.0 7.0 5.0 pinched off tube S7847-1007 type no. 24.576 (h) a S7847-1008 24.576 (h) 2.976 (v) b active area 6.048 (v) 2.54 27.94 20.0 b 36.0 44.0 50.0 35.0 6.4 0.5 18.5 0.5 47.0 50.8 0.25 14 13 12 3 2 16 17 26 27 a 1.0 pin no. 1 1st pin index mark ar-coated sapphire window 15 28 0.46 spectral transmittance characteristic of window material 4
ccd area image sensor S7847 series kmpdc0085ea device structure, line output format ...... ...... ...... v 1h ig1v ig2v isv ss rg rd os od og sg d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 s1 s2 s1023 s1024 d11 d12 d13 d14 d15 d16 d17 d18 d19 d20 8 9 10 11 12 13 3 6 5 7 25 24 v=124, 252 h=1024 ish ig1h ig2h p1h p2h 22 21 20 19 18 4 blank 4 blank 4 optical black 4 optical black 1024 signal out 2 isolatoin 2 isolatoin tg p1v 23 p2v kmpdc0088ea timing chart area scanning 1 (low dark current mode) integration period (shutter must be open) p1v rg os p2v, tg p1h p2h, sg readout period (shutter must be closed) enlarged view 4..127 4..255 128 124+4 (isolation) 256 252+4 (isolation) : S7847-1007 : S7847-1008 tpwv to v r tpwr d1 d2 d3 d4 d18 d19 d20 d5..d10, s1..s1024, d11..d17 p2v, tg p1h p2h, sg rg os tpwh, tpws 123 pixel format left horizontal direction right blank optical black isolation effective isolation optical black blank 4 4 2 1024 2 4 4 top vertical direction bottom isolation effective isolation 2 124 or 252 2 5
ccd area image sensor S7847 series parameter symbol remark min. typ. max. unit pulse width tpwv 6 * 15 --s p1v, p2v, tg rise and fall time tprv, tpfv * 14 200 - - ns pulse width tpwh 250 - - ns rise and fall time tprh, tpfh 10 - - ns p1h, p2h duty ratio - * 14 - 50 - % pulse width tpws 250 - - ns rise and fall time tprs, tpfs 10 - - ns sg duty ratio - - -50- % pulse width tpwr 100 - - ns rg rise and fall time tprr, tpfr - 5 - - ns tg C p1h overlap time tovr - 3 - - s *14: symmetrical pulses should be overlapped at 50 % of maximum amplitude. *15: in case of S7847-1007. kmpdc0103ea area scanning 2 (large full well mode) integration period (shutter must be open) p1v rg os p2v, tg p1h p2h, sg readout period (shutter must be closed) enlarged view 4..127 4..255 128 124+4 (isolation) 256 252+4 (isolation) : S7847-1007 : S7847-1008 tpwv to v r tpwr d1 d2 d3 d4 d18 d19 d20 d5..d10, s1..s1024, d11..d17 p2v, tg p1h p2h, sg rg os tpwh, tpws 123 parameter symbol remark min. typ. max. unit pulse width tpwv 6 * 17 --s p1v, p2v, tg rise and fall time tprv, tpfv * 16 200 - - ns pulse width tpwh 250 - - ns rise and fall time tprh, tpfh 10 - - ns p1h, p2h duty ratio - * 16 - 50 - % pulse width tpws 250 - - ns rise and fall time tprs, tpfs 10 - - ns sg duty ratio - - -50- % pulse width tpwr 100 - - ns rg rise and fall time tprr, tpfr - 5 - - ns tg - p1h overlap time tovr - 3 - - s *16: symmetrical pulses should be overlapped at 50 % of maximum amplitude. *17: in case of S7847-1007. 6
ccd area image sensor S7847 series kmpdc0089ea line binning parameter symbol remark min. typ. max. unit pulse width tpwv 6 * 19 --s p1v, p2v, tg rise and fall time tprv, tpfv * 18 200 - - ns pulse width tpwh 250 - - ns rise and fall time tprh, tpfh 10 - - ns p1h, p2h duty ratio - * 18 - 50 - % pulse width tpws 250 - - ns rise and fall time tprs, tpfs 10 - - ns sg duty ratio - - -50-% pulse width tpwr 100 - - ns rg rise and fall time tprr, tpfr - 5 - - ns tg C p1h overlap time tovr - 3 - - s *18: symmetrical pulses should be overlapped at 50 % of maximum amplitude. *19: in case of S7847-1007. specifications of built-in te-cooler parameter symbol condition min. typ. max. unit internal resistance rint ta=27 c - 1.6 - ? maximum current * 20 imax th * 21 =27 c ? t * 22 = ? tmax - - 4.4 a maximum voltage vmax th* 21 =27 c ? t= ? tmax i=imax --7.4v maximum heat absorption * 23 qmax tc * 24 =th * 21 =27 c i=imax - - 3.0 w maximum temperature at hot side - - - 50 c ccd temperature - ta=25 c - -70 -50 c *20: if the current is greater than imax, the heat absorption begins to decrease due to the joule heat. it should be noted that this value is not a damage threshold. to protect the thermoelectric cooler (peltier element) and maintain stable operation, the supply current should be less than 60 % of this maximum current. *21: temperature at hot side of thermoelectric cooler. *22: ? t=th - tc *23: this is a theoretical heat absorption level that offsets the temperature difference in the peltier element when the maximu m current is supplied to the unit. *24: temperature at cool side of thermoelectric cooler. integration period (shutter must be open) vertical binning period (shutter must be closed) 3..126 3..254 127 255 128 256 p1v p2v, tg p1h p2h, sg readout period (shutter must be closed) 124+4 (isolation): S7847-1007 252+4 (isolation): S7847-1008 tpwv to v r tpwh, tpws tpwr 123 1043 1044 4..1042 12 d19 d2 d1 d20 d3..d10, s1..s1024, d11..d18 rg os 7
ccd area image sensor S7847 series hamamatsu photonics k.k., solid state division 1126-1 ichino-cho, higashi-ku, hamamatsu city, 435-8558 japan, telephone: (81) 53-434-3311, fax: (81) 53-434-5184, http://www.hamamatsu.com u.s.a.: hamamatsu corporation: 360 foothill road, p.o.box 6910, bridgewater, n.j. 08807-0910, u.s.a., telephone: (1) 908-231-0 960, fax: (1) 908-231-1218 germany: hamamatsu photonics deutschland gmbh: arzbergerstr. 10, d-82211 herrsching am ammersee, germany, telephone: (49) 08152 -3750, fax: (49) 08152-2658 france: hamamatsu photonics france s.a.r.l.: 19, rue du saule trapu, parc du moulin de massy, 91882 massy cedex, france, telephone: 33-(1) 69 53 71 00, fax: 33-(1) 69 53 71 10 united kingdom: hamamatsu photonics uk limited: 2 howard court, 10 tewin road, welwyn garden city, hertfordshire al7 1bw, unit ed kingdom, telephone: (44) 1707-294888, fax: (44) 1707-325777 north europe: hamamatsu photonics norden ab: smidesv ? gen 12, se-171 41 solna, sweden, telephone: (46) 8-509-031-00, fax: (46) 8-509-031-01 italy: hamamatsu photonics italia s.r.l.: strada della moia, 1/e, 20020 arese, (milano), italy, telephone: (39) 02-935-81-733, fax: (39) 02-935-81-741 information furnished by hamamatsu is believed to be reliable. however, no responsibility is assumed for possible inaccuracies or omissions. specifications are subject to change without notice. no patent rights are granted to any of the circuits described herein. ?200 5 hamamatsu photonics k.k. kmpdb0107ea v - i ccd temperature - i 0 1 2 3 voltage (v) ccd temperature ( c) 4 5 6 -80 3.0 2.5 2.0 1.5 current (a) 1.0 0.5 0 -60 -40 -20 0 20 40 (typ. ta=25 c)
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/ & & & (((a$* & h kmpdb0108ea 0 -100 -80 -60 -40 -20 0 20 40 resistance ( ) 1400 1200 1000 800 600 400 200 temperature ( c) (typ. ta=25 c) precaution for use (electrostatic countermeasures) handle these sensors with bare hands or wearing cotton gloves. in addition, wear anti-static clothing or use a wrist band with an earth ring, in order to prevent electrostatic damage due to electrical charges from friction. avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge. provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to discharge. ground the tools used to handle these sensors, such as tweezers and soldering irons. it is not always necessary to provide all the electrostatic measures stated above. implement these measures according to the amount of damage that occurs. element cooling/heating temperature incline rate element cooling/heating temperature incline rate should be set at less than 5 k/min. cat. no. kmpd1031e06 apr. 2005 dn 8

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